Most engineers tend to work in and continue to focus on specialized domains. Unfortunately, specialization often means occupying niche spaces and getting isolated from the larger, dynamic technology landscape. Each seminar in the Embrace Technology series attempts to convey the essence of a technology in compressed fashion. Exposure to diverse technologies opens up new thinking and possibilities, besides expanding the scope of one’s job functions. For those in the early phase of their careers, these seminars are meant to serve as an exciting primer to a whole range of technologies and domains. For the more senior folk, it is an opportunity to connect existing knowledge with the missing pieces. Slots are limited and registration prior to the seminar date is essential. In case you face issues paying online, you can choose the payment method as “OFFLINE” to reserve your slot and pay at the venue.




2:00-5:00 PM, July 20th  (Saturday)

…..   Cost: Rs.1,500   
  Venue: Officespac.es, No.4164, 13th A Main, HAL 2nd stage, Indiranagar (on 8th cross, the road opp. 12th Main Coffee Day) …..      


We start with the topic of noise coupling in general, presenting the Aggressor-Victim view of noise coupling for various scenarios. Then we analyze the specifics of noise coupling through the Silicon substrate and identify strategies to counter the problem. 

The analysis of the problem and solution for Substrate noise coupling takes us on an exciting journey across most facets of IC product development – package choices, design and layout techniques for noise reduction, IC fabrication and Silicon substrate choices, reliability considerations like ESD & Latchup, and board design careabouts. A physically intuitive picture emerges through analysis of current loops and by coming up with an electrical model for substrate isolation.

The speaker has authored 2 patents related to Substrate noise reduction and has delivered this seminar in 5 VLSI companies to more than 150 engineers.


Anyone who works on the IC design, layout, verification, characterization or board design of mixed signal ICs. Also relevant for anyone who wants to understand the full cycle of IC product development in the context of noise careabouts.


“Well presented and very well concluded…” 

- Vikas Choudhary, Manager, Analog Devices


“It was really a very effective seminar and the points that you focused on were very helpful from a design point of view” 

- Jatinder Singh, Manager, Society for Integrated Circuit Technology and Applied Research (SITAR)


“The session was very well conducted. The most important careabouts with respect to substrate noise were put together in a coherent fashion and would certainly help anyone designing mixed signal systems. Coming from someone who has faced and successfully solved some tough problems on the subject, the seminar had the depth and the rigor required to be immediately useful in real world designs. Your presentation style is clear and precise, making it even better. Highly recommended!”” 

- Ganesh Kiran, Chip lead, Texas Instruments






2:00-5:00 PM, July 27th  (Saturday)

-.   Cost: Rs.1,500 
Venue: Officespac.es, No.4164, 13th A Main, HAL 2nd stage, Indiranagar    (on 8th cross, the road opp. 12th Main Coffee Day)


With a strong emphasis on signal processing in the digital domain, today’s electronics relies heavily on ADCs – the “eyes” of the signal chain to the real world.  We present a simplistic and highly intuitive derivation of different ADC architectures – FLASH, SAR, PIPELINE & SIGMA-DELTA. Each type of ADC has its unique architecture which gives it unique merits and demerits. We present each architecture as a unique solution to the following problem statement: “If I have an unknown weight and I need to estimate its weight to the resolution of 1 kg, what are the different ways I can come up with the estimate?” Each method of solving this problem gives rise to an ADC architecture!

Relying only on logic, and without cumbersome mathematical equations to worry about, a very intuitive understanding of ADCs emerges. Looked at from this intuitive manner, the merits and demerits of each architecture become immediately obvious. The application of where a given ADC architecture gets used also become very evident. The state-of-the-art ADC of each type is also briefly presented.

The speaker has led several SoC designs involving high-end ADCs and has delivered this seminar in 3 VLSI companies to more than 100 engineers.


Anyone who wants to understand the basic principles of analog to digital data conversion. Mixed signal design, test and characterization engineers, system designers and application engineers will find this a great introduction to ADC architectures, applications and tradeoffs.


“Excellent intuitive way to understand ADCs. I wish colleges teach subjects in this manner. I am sure engineers in every Semiconductor industry will benefit from this presentation.” 

-  Ramanujam (Director of Analog/RF, MaxLinear)


“Very intuitive explanations of basic concepts with the right analogies. Very much satisfying indeed.” 

- Pradeep, Broadcom


“Excellent analogies and one of the best ways to understand ADC architectures.” 

- Phaneendra, Tessolve






2:00-5:00 PM, Aug 3rd  (Saturday)

….. ….. Cost: Rs.2,000 
Venue: Officespac.es, No.4164, 13th A Main, HAL 2nd stage, Indiranagar    (on 8th cross, the road opp. 12th Main Coffee Day)  


Cellular technologies have evolved from the days of Analog-based 1G to the now popular 3G. At the same time, Wireless technologies have evolved from the 1 Mbps 802.11 standard to the 1+ Gbps 802.11ac standard. This seminar presents an overview of the journey of “communication without wires” over a good part of the last century. It includes an explanation of the working principle behind competing cellular standards like CDMA and GSM, technology enablers like OFDM and MIMO, as well as the convergence of Wireless and Cellular technologies in 4G.

A generic signal chain of a wireless system is presented and the function of each block in Digital baseband, Analog and RF sections explained. Key principles of digital modulation including complex I-Q modulation and Shannon’s theorem are succintly explained. A sample link budget is shown to create an appreciation of various challenges involved in the design of these systems. 


Engineers working on ICs or systems for wireless or cellular technologies will find this seminar an eye-opening look at the “big” picture. This includes those working on the digital design, analog/RF design, algorithms, software and system/ hardware aspects of these technologies. It is also a very useful re-look at concepts in a very different manner for students of engineering. A very basic Communications background is assumed.